Apple Firmware Update

Firmware RAM problems: an explanation of CL3 and CL2

Glenn Anderson offers this technical explanation on the disappearing RAM issue. He is the author of DIMMcheck,the application that identifies potentially problematic DIMMs. His repair patch, DIMMFirstAid is also available. (We recommend reading the entire article before attempting to patch your DIMM, as the patch may not be the best solution for some users.) Glenn writes:
“After a week of checking DIMMCheck results and fixing DIMMs, I now know exactly what is going on and can offer some definitive answers on this whole matter

First off, I would like to explain RAM speeds, as there appears to be a lot of confusion about it. After reading the statements from some RAM vendors, it would appear they are just are as confused as everyone else.

The SDRAM chips on DIMMs can run at different speeds, which is set by the CAS Latency (CL) the DIMM is running. Most SDRAM chips can run in CL3 mode and CL2 mode, although a few less common ones can only run in CL3 mode. So far I have not seen any SDRAM chips that only run in CL2 mode in any of the specs I have reviewed. Contrary to popular misunderstanding, CL3 mode is faster than CL2 mode. The reason for this confusion is misunderstanding the PC speed ratings on chips. A PC100-322 DIMM can run at 10ns (100MHz) speed in CL3 mode, that is what that the 3 in PC100-322 is, and it will typically run at 12ns (83MHz) or 15ns (66MHz) in CL2 mode. A PC100-222 DIMM can run at 10ns (100MHz) speed in CL2 mode, but will typically run at 8ns (125MHz) in CL3 mode.

I have only looked at the RAM requirements in the Apple developer notes for the B&W G3 and the G4s (except the new G4s that need PC133 RAM). Apple has always required PC100 RAM that is 8ns or faster. The original iMac requires 10ns RAM, newer iMacs require 8ns, iBooks require 15ns, the PowerBook G3 FireWire and G4 require 10ns. PC100-222 RAM will only run at 8ns (125MHz) or faster when in CL3 mode, in CL2 mode it will only run at 10ns (100MHz).

The new firmware is stricter about enforcing this. About 99% of the RAM that is not working after the firmware update is not working because the timing information in the Serial Presence Detect EEPROM on the DIMM does not have specifications for CL3 mode. The vast majority of these only have timing information for CL2 mode at 10ns (100MHz) speed, they do not have timing for the faster CL3 mode. Even if Apple did support these DIMMs, the DIMMs would not be running at their full speed.

Apple has actually been reasonably lenient with the firmware update, I have seen RAM that will only run at 10ns in CL3 mode working fine in G4s after the update. I have even seen RAM that will run at 10ns with an access time of up to 8ns working after the update, which is only PC66 RAM. For RAM to be PC100 it needs to be 10ns with an access time of 6ns or less.

Of the remaining RAM that is not working after the firmware update, some of it is because the timing information in the SPD EEPROM says it is slower than 10ns, and some of it is just failing to work when run at 8ns or faster. It does appear the new firmware update will take advantage of faster DIMMs.

I am working on a fix for the lack of CL3 timing info in the SPD EEPROM, however it is just a quick fix, all this fix will do is copy the CL2 timing info, which is typically only 10ns.

If you have a DIMM that is not working and is supposedly PC100-222, it will not be running at it’s full speed so you are better off to get it exchanged for one that is properly programmed as it will run faster with the new firmware update. I recommend to RAM vendors that they not just guarantee that their DIMMs will work with the firmware update, they should guarantee that it will work at full speed with the firmware update.

For those unable to return their DIMM, I am still doing some final testing on my fix, it should be available any day now.”

Note: We are beginning to receive reports from testers who have used the fix, and the reports are positive.


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